Semiconductor packages are used for protecting an integrated circuit (IC) chip or die, and also to provide the die with an electrical interface to external circuitry, e.g., a printed circuit board (PCB). With the increasing demand for smaller electronic devices, semiconductor packages are designed to be even more compact and must support larger circuit density. Semiconductor packages normally include a package wafer having a stack up of conducting and dielectric layers with electrical connections to bring an electrical signal from one side of the package wafer (an IC side) to an opposite side (a PCB side). For example, wafer level packages such as embedded wafer level ball grid arrays (eWLBs) include one or more patterned redistribution layers (RDLs) to provide a fan out from close-pitch wafer pads on an IC to corresponding relaxed-pitch contact pads on a PCB. The patterned RDLs normally have a single thickness for all conductive traces within the same physical layer of the pattern. This fixed-thickness architecture of the patterned RDL translates into a single minimal spacing or minimal pitch for regular patterns of the conductive traces of the RDL.